ICECS 2017, 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS)

Tutorial 1 - Ultra Low-Power ASIC Design for IoT SoC’s: A Digital Design Journey from Concept to a Chip

Tuesday, December 05, 2017 09.30-12.30

Abstract

Ultra low-power SoC’s are the heart of many IoT devices in present and future products. Many emerging wearable devices (medical or others) can be relaized only by mastering the design art of digital SoC’s.

This tutorial introduces the design steps and techniques needed to design ultra low-power IoT SoC’s using digital ASIC design flow.

The tutorial will introduce the the steps needed to carry on an IoT digital ASIC design from concept to a final tape-out ready GDSII. Necessary steps to perform simulation, Syntheis, place and route and chip finsihing will be explained. Static timing analysis, timing verfication and formal verfication will be covered.

Moreover, the tutorial will discuss ultra low power design techniques and it’s applications in the context of IoT ASICs.

Additionally, the tutorial will present the attendees with a sample digital design with all necessary scripts and to drive it through a tape-out proven flow from RTL to GDSII using Sysnopsys Tools.

The material covered will cover digital ASIC requirmenst for IoT, system level design, ultra-low power design techniques, RTL development and design verification tips, Synthesis, place, route, clock-tree, Static Timing Analysis, formal verfication methods and Chip finishing.

Motivation and Objectives

Importance to ICECS community: IoT enables a very wide range of products that touches all aspect of our life from personable healthcare mobile waerable devices to all connected and fully integrated smart home and office areas (connected everywhere). This tutorial gives a very good solid intro for the art of digital ASICS targetting IoT devices. A comprehensive coverage of ultra-low-power design methods at the digital ASIC design level will be presented. Lastly, a sample design with tape-out proven EDA tools scripts will be explained and given to attendees to start designing their IoTs immediately.

Learning Objectives:

IoT Design challenges for Digital ASIC design
Techniques for realizing ultra low-power IoT designs
ASIC Design Flow form concept to GDSII
Basics of Synthesis
Floorplaning tricks and techniques
Place and Route and chip finishing
How to guarantee first time success silicion

Tutorial outline:

Digital ASIC requirment for IoT
How to understand a chip design problem and how does that affect the rest of the chip design flow
System Level design and its importance for contemporary design realization
How to achive ultra-low power IoT ASIC’s throughout the whole ASIC design flow
RTL development and design verification
Concepts of Synthesis, place, route, clock-tree
Static Timing Analysis & other formal verification methods
Chip finishing
Sample design, flow & scripts (based on Synopsys ASIC design tools)

Presenter 1: Dr. Hani Saleh

Hani Saleh is an assistant professor of electronic engineering at Khalifa University since 2012. He is an active member in KSRC (Khalifa University Research Center) where he leads a projects for the development of wearable blood glucose monitor SOC and a mobile surveillance SOC. Hani has a total of 19 years of industrial experience in ASIC chip design, microprocessor design, DSP core design, graphics core design and embedded system design.

Hani experience spans DSP core design, microprocessor peripherals design, microprocessors and graphics core deign. Prior to joining Khalifa University he worked as a Senior Chip Designer (Technical Lead) at Apple incorporation; where he worked on the design and implementation of Apple next generation graphics cores for its mobile products (iPad, iPhone, ...etc.), prior to joining Apple, he worked for several leading semiconductor companies including Intel (ATOM mobile microprocessor design), AMD (Bobcat mobile microprocessor design), Qualcomm (QDSP DSP core design for mobile SOC’s), Synopsys (a key member of Synopsys turnkey design group where he taped out many ASICs and designed the I2C DW IP included in Synopys DesignWare library), Fujitsu (SPARC compatible high performance microprocessor design) and Motorola Australia (M210 low power microprocessor synthesizable core design).

Hani received a Bachelor of Science degree in Electrical Engineering from the University of Jordan, a Master of Science degree in Electrical Engineering from the University of Texas at San Antonio, and a Ph.D. degree in Computer Engineering from the University of Texas at Austin. Hani research interest includes DSP algorithms design, DSP hardware design, computer architecture, computer arithmetic, SOC design, ASIC chip design, FPGA design and automatic computer recognition. Hani has 11 issued US patents, 3 pending patent application, and over 81 articles published in peer review conferences and Journals in the areas of digital system design, computer architecture, DSP and computer arithmetic.

Presenter 2: Prof. Mohammed Ismail

Mohammed Ismail spent over 25 years in academia and industry in the U.S. and Europe. He served as a Faculty Member with the Ohio State University’s (OSU) ElectroScience Laboratory, Columbus, OH, USA.

He was a Research Chair with the Swedish Royal Institute of Technology, Stockholm, Sweden, where he founded the Radio and Mixed Signal Integrated Systems Research Group. He held visiting appointments with Aalto University, Espoo, Finland, the Norwegian Institute of Technology, Trondheim, Norway, the University of Oslo, Oslo, Norway, Twente University, Enschede, The Netherlands, and the Tokyo Institute of Technology, Tokyo, Japan.

He joined the Khalifa University of Science, Technology and Research, Abu Dhabi, United Arab Emirates, in 2011, where he holds the ATIC Professor Chair and is the Head of the Electrical and Computer Engineering Department, which exists on both campuses in Sharjah and Abu Dhabi. He advised the work of over 50 Ph.D. degree students and over 100 M.S. degree students. He has served as a Corporate Consultant to over 30 companies and is the Co-Founder of Micrys Inc., Columbus, Spirea AB, Stockholm, Firstpass Technologies Inc., Dublin, OH, USA, and ANACAD (currently part of Mentor Graphics), Cairo, Egypt.

He is currently a prolific author and an entrepreneur in chip design and test. He is the Founder of the OSU’s Analog VLSI Laboratory, one of the foremost research entities in the field of analog, mixed signal, and RF integrated circuits. He serves as the Director of KSRC and the Co-Director of the ATIC-SRC Center of Excellence on Energy Efficient Electronic Systems targeting self-powered chip sets for wireless sensing and monitoring, biochips, and power management solutions. He has authored or co-authored over 20 books and over 150 journal publications and holds eight U.S. patents issued and several pending. His current research interests include self-healing design techniques for CMOS RF and millimeter wave ICs in deep nanometer nodes.

Prof. Ismail received the U.S. Presidential Young Investigator Award, the Ohio State Lumley Research Award four times in 1992, 1997, 2002, and 2007, and the U.S. Semiconductor Research Corporations Inventor Recognition Award twice. He is the Founding Editor of the Journal of Analog Integrated Circuits and Signal Processing (Springer) and serves as the Journals Editor-in-Chief. He has served the IEEE in many editorial and administrative capacities. He is the Founder of the IEEE International Conference on Electronics, Circuits and Systems and the Flagship Region 8 Conference of the IEEE Circuits and Systems Society.

Joint Publications by the two presenters:

N. Bayasi, T. Tekeste, H. Saleh, B. Mohammad, A. Khandoker and M. Ismail, "Low-Power ECG-Based Processor for Predicting Ventricular Arrhythmia," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 24, no. 5, pp. 1962-1974, May 2016. doi: 10.1109/TVLSI.2015.2475119 Won the IEEE Very Large Scale Integration Systems Best Journal Paper award in 2016.
Mohammad, B.S.; Saleh, H.; Ismail, M., "Design Methodologies for Yield Enhancement and Power Efficiency in SRAM-Based SoCs," Very Large Scale Integration (VLSI) Systems, IEEE Transactions on , vol.PP, no.99, pp.1,1, Oct. 2014. doi: 10.1109/TVLSI.2014.2360319
Wahbah, M.; Alhawari, M.; Mohammad, B.; Saleh, H.; Ismail, M., "Characterization of Human Body-Based Thermal and Vibration Energy Harvesting for Wearable Devices," Emerging and Selected Topics in Circuits and Systems, IEEE Journal on , vol.4, no.3, pp.354,363, Sept. 2014. doi: 10.1109/JETCAS.2014.2337195 doi: 10.1109/TVLSI.2015.2440392
M. Alhawari; B. Mohammad; H. Saleh; M. Elnaggar, "An Efficient Zero Current Switching Control for L-based DC-DC Converters in TEG Applications," in IEEE Transactions on Circuits and Systems II: Express Briefs , vol.PP, no.99, pp.1-1 doi: 10.1109/TCSII.2016.2558110
Maisam Wahbah, Mohammad Alhawari, Baker Mohammad, Hani Saleh, Mohammed Ismail, “An AC–DC converter for human body-based vibration energy harvesting,” Elsevier Microelectronics Journal, July, 2016. doi: http://dx.doi.org/10.1016/j.mejo.2016.06.006
D. Kilani; M. Alhawari; B. Mohammad; H. Saleh; M. Ismail, "An Efficient Switched-Capacitor DC-DC Buck Converter for Self-Powered Wearable Electronics," in IEEE Transactions on Circuits and Systems I: Regular Papers , vol.PP, no.99, pp.1-10 doi: 10.1109/TCSI.2016.2586117
Mohammad Khader , Agaian Sos and Saleh Hani, "Arabic License Plate Recognition System,"Columbia International Publishing, Dec 2012, doi: 0.7726/jspta.2013.1002.
Mohammad Alhawari, Baker Mohammad, Hani Saleh, and Mohammed Ismail, “An Efficient Polarity Detection Technique for Thermoelectric Harvester in L-based Converters,” in IEEE Transactions on Circuits and Systems I. doi: 10.1109/TCSI.2016.2619758.
T. Tekeste, N. Bayasi, H. Saleh, A. Khandoker, B. Mohammad and M. Ismail, “A Nano-Watt ECG Feature Extraction Engine in 65nm Technology,” IEEE Transactions on Circuits and Systems II.
M. Yasin; T. Tekeste; H. Saleh; B. Mohammad; O. Sinanoglu; M. Ismail, "Ultra-Low Power, Secure IoT Platform for Predicting Cardiovascular Diseases," in IEEE Transactions on Circuits and Systems I: Regular Papers , vol.PP, no.99, pp.1-14 doi: 10.1109/TCSI.2017.2694968

Tutorial 3 - Design of Broadband Matching Networks and RF and Microwave Amplifiers Using Real Frequency Synthesis Robots

Tuesday, December 05, 2017 14.00-17.00

Abstract

Broadband matching networks, RF and microwave amplifiers are the vital building blocks of many wireless communications systems. Expected investments for new generation base stations will be about $500 Billion within next 3 years. As of today, total number of connected devices is more than 50 Billion units, which covers several hundreds of billions dollars of systems. Many kinds of radar investments for various applications (Land Radars, Mobile radars, Smart Cars, surveillance) will amount to trillions of dollars up to 2025. Hence, emerging global wireless market demands the design and mass production of many varieties of broadband matching networks, low-noise small signal and high power microwave amplifiers utilizing devices over several hundreds of MHz to X-Band. Especially, power transistors shows weird input and output load-pulled measured input and output impedances. As the operating frequency increases, real parts of the impedances drastically drops from several tenth ohms down to fractions of ohms. That is to say away from 50 ohms requiring more than 1 to 100 impedance transformation ratio. Therefore, design of Input and output matching networks (IMN & OMN) for the wideband amplifiers become highly crucial. Furthermore, element values of IMN and OMN shows wide spread which may be difficult to manufacture if not impossible. In this case, design philosophy and methods of matching networks become very important to end up with reasonable gain, high Power Added Efficiency over wide frequency band of operations.

One have the following options to design IMN and OMNs

Design with Lumped Circuit Elements
Design with Commensurate Transmission lines (or equivalently distributed elements) implemented as microstrips lines, coplanar lines etc.
Design with mixed lumped and distributed elements (in short, with mixed elements).

In the current literature [1-3], it is shown that, the Real Frequency Techniques (RFTs) provides excellent solutions to matching and amplifier design problems yielding optimum circuit topologies.

Therefore, this tutorial is devoted to RFTs to construct broadband matching networks and wideband amplifiers.

Tutorial consist of two parts. In the first part, we will review the basic design principals and physical limitations to construct broadband matching networks and wideband amplifiers. Then, Real Frequency Techniques (RFTs) are summarized. In this regard, Real Frequency-Line segments technique (RF-LT), Real Frequency-Direct Computational Technique (RF-DCT), Real-Frequency-Parametric Approach (RF-PA) and Simplified Real Frequency Technique (SRFT) is covered.

Several actual matching networks and amplifier design examples are presented. It is worth mentioning that design examples are constructed employing lumped, distributed and mixed circuit elements. Darlington synthesis is the crucial part and the last step of RFTs. Therefore, in the second part of the tutorial, we introduce our high precision network synthesis tools or robots, which yield optimum matching topologies with element values.

The tutorial material is based on our papers and books published on RFTs. The major books are given as follows.

[1] A. Grobennikov, N. Kumar and B.S. Yarman, Broadband RF and Microwave Amplifiers, CRS Press of Taylor and Francis, 2016.
[2] B.S. Yarman, Design of Ultra Wideband Power Transfer Networks, Wiley Communication Series 2010.
[3] B.S. Yarman, Design of Ultra Wideband Antenna Matching Networks, Springer 2008.

Tutorial Schedule: December 5, 2017, Hilton Batumi, Georgia
Part I: 09.30-12.00 (Morning Session)
Lunch Break: 12.00-14.00
Part II: 14.00-16.30 (Afternoon Session)

Presenter: Prof. Binboga Siddik Yarman

Binboga Siddik Yarman received his BSc Degree from Technical University of Istanbul in Feb. 1974; MSc. Degree from Stevens Institute of Technology (June 1977), Hoboken, N.J., USA, and Ph.D. Degree from Cornell University (January 1982), Ithaca, NY, USA.

He was a Member of Technical Staff at General David Sarnoff Microwave Technology and Research Center, in Princeton, NJ, USA.

He served as professor and administrator at various Universities: Anadolu University, Middle East Technical University, Istanbul University, Isik University of Turkey; Technical University of Istanbul, Ruhr University of Germany, Tokyo Institute of Technology of Japan, Wuhan Technology University of China.

He is one of the founders of Savronik Group of Companies and recently serves as the Chairman of the Board of Dirctors.

He was the founding president of Isik University (1996-2004) and used to served as the Chairman of Board of Trustees (2009-2016).

He published numerous papers in the field of Microwave Engineering, Circuit and Systems, Signal Processing, Mathematical Modeling and Decision Making.

He has published 4 books: Design of Ultra - Wideband Antenna Matching Networks by Springer (2008), Design of Ultra - Wideband Power Transfer Networks by Wiley (2010), Intelligence Based Decision Making by Nobel Press of Turkey (2014) and He is one of the co-author of the book titled “Broadband Microwave and RF Power Amplifiers” by CRC (November 2015).

He holds 4 US and 9 Turkish Patents.

He was the recipient of Young Turkish Scientist Award (1986), Technology Award (1987) of Scientific and Research Council of Turkey. He is a member of New York Academy of Science (1994), selected as the Man of the year in Science and Technology of Cambridge Biography (1999). He is a Fellow of IEEE; Alexander Von Humboldt Fellow and Salzburg Fellow of USIS.

AMM-1 Analog Digital Converters

Wednesday, December 06, 2017 11:15 - 13:00

Chair: İzzet Kale - UK

1018 - A 40-KS/S 16-BIT NON-BINARY SAR ADC IN 0.18 μM CMOS WITH NOISE-TUNABLE COMPARATOR

Takaaki Ito, The University Of Tokyo, Japan
Tetsuya Iizuka, The University Of Tokyo, Japan
Toru Nakura, The University Of Tokyo, Japan
Kunihiro Asada, The University Of Tokyo, Japan

1029 - A LOW-POWER COMPARATOR-REDUCED FLASH ADC USING DYNAMIC COMPARATORS

Hasan Molaei, Sharif University Of Technology, Iran
Khosrow Hajsadeghi, Sharif University Of Technology, Iran

1043 - DIGITAL CORRECTION OF MISMATCHES IN TIME-INTERLEAVED ADCS FOR DIGITAL-RF RECEIVERS

Tomoya Takahashi, Osaka Institute Of Technology, Japan
Takao Kihara, Osaka Institute Of Technology, Japan
Tsutomu Yoshimura, Osaka Institute Of Technology, Japan

9015 - AN 8 BIT 2GS/S ADC BUILDING BLOC DESIGN FOR NUCLEAR PHYSICS INSTRUMENTS

Gabriel Puech, Laboratoire De Physique De Clermont, In2p3, France

9022 - ANALYSIS OF THE SETTLING BEHAVIOR OF AN EXTERNAL REFERENCE VOLTAGE SOURCE FOR A 16BIT AND 200MS/S PIPELINE ANALOG-TO-DIGITAL CONVERTER

Robert Loehr, Friedrich-alexander University Erlangen-nuremberg, Germany
Leon Bender, Friedrich-alexander University Erlangen-nuremberg, Germany
Frank Ohnhaeuser, Eesy-ic Gmbh, Germany
Robert Weigel, Friedrich-alexander University Erlangen-nuremberg, Germany

COM-1 Amplifiers in Communications

Wednesday, December 06, 2017 11:15 - 13:00

Chair: Ney Calazans - Brazil

1024 - MATRIX SINGLE STAGE DISTRIBUTED AMPLIFIER DESIGN FOR ULTRA WIDEBAND APPLICATION

Temitope Odedeyi, University College London, United Kingdom
Izzat Darwazeh, University College London, United Kingdom

1047 - A 60 - 90GHZ STAGGER-TUNED LOW-NOISE AMPLIFIER WITH 1.2DBM OP1DB IN 65NM CMOS

Ademola Mustapha, Masdar Institute Of Science And Technology, United Arab Emirates

1097 - A NOVEL METHOD TO DESIGN BROADBAND FLAT GAIN AND SUFFICIENTLY EFFICIENT POWER AMPLIFIERS USING REAL FREQUENCY TECHNIQUE

Sedat Kilinc, Istanbul University, Turkey
Bekir Siddik Binboga Yarman, Istanbul University, Turkey

9048 - DOHERTY CMOS POWER AMPLIFIERS FOR 5G TECHNOLOGY

Nourhan Elsayed, Khalifa University, United Arab Emirates
Hani Saleh, Khalifa University, United Arab Emirates
Baker Mohammad, Khalifa University, United Arab Emirates
Mohammed Elnaggar, Wayne State University, United States

9065 - L-BAND POWER AMPLIFIER DESIGN WITH DISCRETE GAN TRANSISTOR

Mina Amiri, Collage Of Electrical And Computer Engineering, University Of Tehran, Iran
Yasin Alekajbaf, Collage Of Electrical And Computer Engineering, University Of Tehran, Iran
Nasser Masoumi, Collage Of Electrical And Computer Engineering, University Of Tehran, Iran
Mohammad Moghaddam Tabrizi, Collage Of Electrical And Computer Engineering, University Of Tehran, Iran

EDA-1 Digital Applications

Wednesday, December 06, 2017 11:15 - 13:00

Chair: Ricardo Reis - Brazil

1032 - INVESTIGATING PARALLEL TMR APPROACHES AND THREAD DISPOSABILITY IN LINUX

Gennaro Rodrigues, Ufrgs, Brazil
Felipe Rosa, Ufrgs, Brazil
Fernanda Kastensmidt, Ufrgs, Brazil
Ricardo Reis, Ufrgs, Brazil
Luciano Ost, University Of Leicester, United Kingdom

1106 - UFRGSPLACE: ROUTABILITY DRIVEN FPGA PLACEMENT ALGORITHM FOR HETEROGENEOUS FPGAS

Julia Puget, Ufrgs, Brazil
Andre Oliveira, Ufrgs, Brazil
Jorge Seclen, Ufrgs, Brazil
Ricardo Reis, Ufrgs, Brazil

1114 - A POST-PROCESSING METHODOLOGY TO IMPROVE THE AUTOMATIC DESIGN OF CMOS GATES AT LAYOUT-LEVEL

Gustavo Smaniotto, Ufpel, Brazil
Maicon Cardoso, Ufpel, Brazil
Renato De Souza, Ufpel, Brazil
Regis Zanandrea, Ufpel, Brazil
Felipe Marques, Ufpel, Brazil
Matheus Moreira, Pucrs, Brazil
Leomar Rosa Jr., Ufpel,

9016 - CONSTRUCTION OF COVERAGE DATA FOR POST-SILICON VALIDATION USING BIG DATA TECHNIQUES

Eman El Mandouh, Mentor Graphics Corporation, Egypt
Ahmed Gamal, Cairo University, Faculty Of Engineering, Computer Engineering Department, Egypt
Ahmed Khaled, Cairo University, Faculty Of Engineering, Computer Engineering Department, Egypt
Taha Ibrahim, Cairo University, Faculty Of Engineering, Computer Engineering Department, Egypt
Elsayed Hemayed, Cairo University, Faculty Of Engineering, Computer Engineering Department, Egypt
Amr G. Wassal, Cairo University, Faculty Of Engineering, Computer Engineering Department, Egypt

9020 - SMART AUTO-CORRECTION METHODOLOGY USING ASSERTIONS AND DYNAMIC PARTIAL RECONFIGURATION

Khaled Mohamed, Mentor, Egypt
Mohamed Abdelsalam, Mentor, Egypt

LNL-1 Memristive Systems

Wednesday, December 06, 2017 11:15 - 13:00

Chair: Zbigniew Galias - Poland

1046 - TIO2 MEMRISTOR MODEL-BASED CHAOTIC OSCILLATOR

Fakhreddine Zayer, National School Of Engineer Of Monastir, Tunisia
Wael Dghais, Issat Sousse, Tunisia
Hamdi Belgacem, Issat Sousse, Tunisia

1059 - TOWARDS MEMRISTOR EMULATORS USING THE MOS-ONLY TECHNIQUE

Bilgin Metin, Bogazici University, Turkey
Oguzhan Cicekoglu, Bogazici University, Turkey

1092 - A NOVEL SECURE CONFERENCE COMMUNICATION IN IOT DEVICES BASED ON MEMRISTORS

Heba Abunahla, Khalifa University, United Arab Emirates
Dina Shehada, Khalifa University, United Arab Emirates
Chan Yeob, , United Arab Emirates
Baker Mohammad, Khalifa University, United Arab Emirates
Thanos Stouraitis, , United Arab Emirates

9023 - HYBRID MEMRISTOR-CMOS BASED LINEAR FEEDBACK SHIFT REGISTER DESIGN

Abubaker Sasi, University Of Windsor, Canada
Amirali Amirsoleimani, University Of Windsor, Canada
Arash Ahmadi, University Of Windsor, Canada
Majid Ahmadi, University Of Windsor, Canada

9069 - COEXISTENCE OF ATTRACTORS IN THE PARALLEL INDUCTOR-CAPACITOR-MEMRISTOR CIRCUIT

Zbigniew Galias, Agh University Of Science And Technology, Poland

AMM-2 OpAmp

Wednesday, December 06, 2017 14:15 - 16:00

Chair: Eduardo Costa - Brazil

9004 - A FULLY-DIFFERENTIAL OPERATIONAL AMPLIFIER USING A NEW CHOPPING TECHNIQUE AND LOW-VOLTAGE INPUT DEVICES

Timo Mai, Institute For Electronics Engineering, Germany
Konstantin Schmid, Eesy-ic Gmbh, Germany
Jürgen Röber, Eesy-ic Gmbh, Germany
Amelie Hagelauer, Institute For Electronics Engineering, Germany
Robert Weigel, Institute For Electronics Engineering, Germany

9039 - A CASE STUDY ON DYNAMIC CONTROL OF COMPLEX OPERATIONAL AMPLIFIER PERFORMANCE USING BACK GATE BIASING

Bangalore Ramesh Akshay Agashe, Fraunhofer Institute For Integrated Circuits (iis), Germany
Elmar Herzer, Fraunhofer Institute For Integrated Circuits (iis), Germany
Johann Hauer, Fraunhofer Institute For Integrated Circuits (iis), Germany

9066 - METHOD FOR SPEEDING THE MICROPOWER CMOS OPERATIONAL AMPLIFIERS WITH DUAL-INPUT-STAGES

Nikolay Prokopenko, Don State Technical University; Institute For Design Problems In Microelectronics Of Ras, Russia
Nikolay Butyrlagin, Don State Technical University, Russia
Anna Bugakova, Don State Technical University, Russia
Andrey Ignashin, Don State Technical University, Russia

1015 - A CASE STUDY ON DYNAMIC CONTROL OF COMPLEX OPERATIONAL AMPLIFIER PERFORMANCE USING BACK GATE BIASING

COM-2 Communication Circuits

Wednesday, December 06, 2017 14:15 - 16:00

Chair: Tsutomu Yoshimura - Japan

1057 - LOW-VOLTAGE LOW-DISTORTION SAMPLING SWITCH DESIGN IN 22 NM FD-SOI CMOS TECHNOLOGY

Pragoti Pran Bora, Fraunhofer Emft, Germany
David Borggreve, Fraunhofer Emft, Germany
Frank Vanselow, Fraunhofer Emft, Germany
Erkan Isa, Fraunhofer Emft, Germany
Linus Maurer, Universitaet Der Bundeswehr, Germany

1094 - MULTIBAND AND CONCURRENT MATCHING NETWORK DESIGN VIA BRUNE SECTIONS

Serkan Yildiz, Tubitak, Turkey
Ahmet Aksen, Isik University, Turkey
Siddik B. Yarman, Istanbul University, Turkey

9043 - THE ARC-HPF WITH INDEPENDENT TRIMMING OF THE MAIN CHARACTERISTICS

Daria Denisenko, Don State Technical University, Russia
Yuri Ivanov, Southern Federal University, Russia
Nikolay Prokopenko, Don State Technical University, Russia

9050 - A CONCURRENT MULTIBAND FULLY DIFFERENTIAL CMOS LNA WITH A LOCAL ACTIVE FEEDBACK FOR CELLULAR APPLICATIONS 3G-4G

Hakan Çetinkaya, Istanbul Technical University, Turkey
Tufan Karalar, Istanbul Technical University, Turkey
Siddik Yarman, Istanbul University, Turkey

9071 - DESIGN OF 0-15GHZ BAND 180 DEGREE DIGITAL PHASE SHIFTING CELL TOPOLOGY

Celal Avci, Istanbul Technical University, Turkey
Ece Olcay Gunes, Istanbul Technical University, Turkey
Binboga Siddik Yarman, Istanbul University, Turkey

EDA-2 Electronic Design

Wednesday, December 06, 2017 14:15 - 16:00

Chair: Emmanouil Kalligeros - Greece

1023 - SPICE SIMULATION OF FERRITE CORE LOSSES AND HOT SPOT TEMPERATURE ESTIMATION

Sam Ben-yaakov, Ben Gurion University, Israel

1065 - APPLICATION SPECIFIC DESIGN FOR DIGITAL BEAM-FORMER (DBF)

Ahood Al Jneibi, Khalifa University, United Arab Emirates
Menatalla Hassan, Khalifa University, United Arab Emirates
Hani Saleh, Khalifa University, United Arab Emirates
Lilas Alrahis, Khalifa University, United Arab Emirates
Tasneem Assaf, Khalifa University, United Arab Emirates

1077 - THE ASSESSMENT OF THE ANTENNA CIRCUIT OF A RF WHEEL UNIT

Emil Lazarescu, Politehnica University Timisoara, Romania
Florin Alexa, Politehnica University Timisoara, Romania
Doru Vatau, Politehnica University Timisoara, Romania
Flaviu Mihai Frigura-iliasa, Politehnica University Timisoara, Romania

1095 - DESIGN CONSIDERATIONS FOR NEAR TO THE GROUND COMMUNICATION SYSTEM AND ASSOCIATED SUB-GHZ LOW PROFILE ANTENNA

Vadi Su Yilmaz, Atilim University, Turkey
Gulsima Bilgin, Atilim University, Turkey
Elif Aydin, Atilim University, Turkey
Ali Kara, Atilim University, Turkey

9070 - AUTOMATIC SENSITIVITY ANALYSIS TOOL FOR ANALOG ACTIVE FILTER

Amin Sallem, Leti- Enis, University Of Sfax, Tunisia
Pedro Pereira, Cts-uninova, Fct Nova, Portugal
Mourad Fakhfakh, Enet, Tunisia

LNL-2 Neural Networks

Wednesday, December 06, 2017 14:15 - 16:00

Chair: Satoshi Komatsu - Japan

1034 - LEARNING AND REAL-TIME CLASSIFICATION OF HAND-WRITTEN DIGITS WITH SPIKING NEURAL NETWORKS

Shruti R. Kulkarni, New Jersey Institute Of Technology, United States
John M. Alexiades, New Jersey Institute Of Technology, United States
Bipin Rajendran, New Jersey Institute Of Technology, United States

1038 - LOW POWER NEUROMORPHIC HARDWARE BASED MULTI-MODAL AUTHENTICATION SYSTEM

Manan Suri, Indian Institute Of Technology-delhi, India
Shridu Verma, Indian Institute Of Technology-delhi, India
Narayani Bhatia, Indian Institute Of Technology-delhi, India
Salam Thoi Thoi Singh, Indian Institute Of Technology-delhi, India

1086 - EVALUATING RECONFIGURABLE SUBSTRATES FOR INTELLIGENT HARDWARE SYSTEMS

Omar Eldash, University Of Louisiana At Lafayette, United States
Kasem Khalil, University Of Louisiana At Lafayette, United States
Magdy Bayoumi, University Of Louisiana At Lafayette, United States

1115 - HAND GESTURE CLASSIFICATION USING INERTIAL BASED SENSORS VIA A NEURAL NETWORK

Erhan Akan, Atilim University, Turkey
Hakan Tora, Atilim University, Turkey
Baran Uslu, Atilim University, Turkey

9038 - SUBSET SELECTION FOR TUNING OF HYPER-PARAMETERS IN ARTIFICIAL NEURAL NETWORKS

K. K. Emre Aki, Fmv Isik University, Turkey
Tugba Erkoç, Fmv Isik University, Turkey
M. Taner Eskil, Fmv Isik University, Turkey

AMM-3 Analog Filters

Wednesday, December 06, 2017 16:15 - 18:00

Chair: Norbert Herencsar - Czech Republic

1037 - A NEW CURRENT MODE IMPLEMENTATION OF THE RECONFIGURABLE ANALOG BASEBAND LOW PASS FILTER WITH CELL-BASED VARIABLE TRANSCONDUCTANCE AMPLIFIER

Ersin Alaybeyoglu, Bartin University, Turkey
Hakan Kuntman, Istanbul Technical University, Turkey

1075 - 0.5-V BULK-DRIVEN QUASI-FLOATING GATE TRANSCONDUCTANCE AMPLIFIER

Montree Kumngern, King Mongkut’s Institute Of Technology Ladkrabang, Thailand

1121 - DESIGN OF INTEGER/FRACTIONAL-ORDER FILTER WITH ELECTRONICALLY RECONFIGURABLE TRANSFER RESPONSE USING COMMERCIALLY AVAILABLE ELEMENTS

Roman Sotner, Brno University Of Technology, Czech Republic
Norbert Herencsar, Brno University Of Technology, Czech Republic
Jan Jerabek, Brno University Of Technology, Czech Republic
Jiri Petrzela, Brno University Of Technology, Czech Republic
Tomas Dostal, College Of Polytechnics Jihlava, Czech Republic

9037 - NOVEL MS2-TYPE FDNR SIMULATION CONFIGURATION WITH ELECTRONIC CONTROL AND GROUNDED CAPACITANCES

Dinesh Prasad, Jamia Millia Islamia, India
Mayank Srivastava, Kiet Ghaziabad, India

9047 - INTEGRATOR WITH P-CHANNEL DEPLETION MOS SWITCH

Huseyin Ozgur Kazanci, Akdeniz University, Turkey

COM-3 FPGA Applications

Wednesday, December 06, 2017 16:15 - 18:00

Chair: Fernando Moraes - Brazil

1025 - EVALUATION OF NOC ON MULTI-FPGA INTERCONNECTION USING GTX TRANSCEIVER

Atef Dorai, Irisa, France
Olivier Sentieys, Irisa, France
Helene Dubois, Irisa, France

1030 - FPGA-BASED IMPLEMENTATION OF A FREQUENCY SPREADING FBMC-OQAM BASEBAND MODULATOR

Miguel Carvalho, Inesc Tec And Feup, Portugal
Mario Lopes Ferreira, Inesc Tec And Feup, Portugal
Joao Canas Ferreira, Inesc Tec And Feup, Portugal

1068 - DESIGN OF RECONFIGURABLE SHAPED OFFSET QUADRATURE PHASE SHIFT KEYING (SOQPSK) TRANSMITTER ON FIELD PROGRAMMABLE GATE ARRAY (FPGA)

Gorakh Chaubey, Diat Drdo, India
Aniket Hendre, Gmrt, India
Chinmoy Bhattacharya, Arde Drdo, India

1082 - EFFICIENT FPGA IMPLEMENTATION OF PROBABILISTIC GALLAGER B LDPC DECODER

Fakhreddine Ghaffari, Etis, Umr 8051,univ. Paris Seine, Univ. Cergy-pontoise, Ensea, Cnrs, France
Burak Unal, Dep. Of Electrical And Computer Engineering, Uni. Of Arizona, United States
Ali Akoglu, Dep. Of Electrical And Computer Engineering, Uni. Of Arizona, United States
Khoa Le, Etis, Umr 8051,univ. Paris Seine, Univ. Cergy-pontoise, Ensea, Cnrs, France
David Declercq, Etis, Umr 8051,univ. Paris Seine, Univ. Cergy-pontoise, Ensea, Cnrs, France
Bane Vasic, Dep. Of Electrical And Computer Engineering, Uni. Of Arizona, United States

9042 - HLTB DESIGN FOR HIGH-SPEED MULTI-FPGA PIPELINES

Josef Magri, University Of Malta, Malta
Owen Casha, University Of Malta, Malta
Keith Bugeja, University Of Malta, Malta
Edward Gatt, University Of Malta, Malta
Ivan Grech, University Of Malta, Malta

ETD-1 Emerging Systems

Wednesday, December 06, 2017 16:15 - 18:00

Chair: Kunihiro Asada - Japan

1013 - A CELL CLUSTERING TECHNIQUE TO REDUCE TRANSISTOR COUNT

Calebe Conceicao, Ppgc/ufrgs, Brazil
Gisell Moura, Pgmicro/ufrgs, Brazil
Filipe Pisoni, Inf/ufrgs, Brazil
Ricardo Reis, Inf/ufrgs, Brazil

1039 - CAPACITIVE SENSOR TECHNOLOGY FOR SOIL MOISTURE MONITORING NETWORKS

Schubert Martin J. W., Oth Regensburg, Germany
Seign Stefan, Oth Regensburg, Germany
Dai Qibin, Oth Regensburg, Germany
Hinterseer Sebastian, Oth Regensburg, Germany
Pielmeier Florian, Oth Regensburg, Germany
Yu Changqing, Oth Regensburg, Germany
Zenger Stefan, Oth Regensburg, Germany

1058 - SUPPLEMENTARY MOS-ONLY BUTTERWORTH LP BP FILTER CIRCUITS

Oguzhan Cicekoglu, Bogazici University, Turkey
Norbert Herencsar, Brno University Of Technology, Czech Republic
Bilgin Metin, Bogazici University, Turkey

9032 - CHALLENGES FOR FULLY-INTEGRATED RESONANT SWITCHED CAPACITOR CONVERTERS IN CMOS TECHNOLOGIES

Yasser Moursy, Univ. Grenoble Alpes, Cea, Leti, F-38000, Grenoble, France
Anthony Quelen, Univ. Grenoble Alpes, Cea, Leti, F-38000, Grenoble, France
Gael Pillonnet, Univ. Grenoble Alpes, Cea, Leti, F-38000, Grenoble, France

1089 - SIMPLIFIED SYMPES CODEC WITH POSITIVE DC OFFSET

Binboga Siddik Yarman, Istanbul University, Turkey
Osman Korkmaz, RFT Co., Turkey
Mehmet Temizyurek, RFT Co., Turkey
Fuat Ince, RFT Co., Turkey
Basak Hassoy, STM Co., Turkey
Haluk Canberi, STM Co., Turkey
Erhan Ceran, STM Co., Turkey
Emre Gultekin, STM Co., Turkey

LNL-3 Non-Linear Systems

Wednesday, December 06, 2017 16:15 - 18:00

Chair: Sam Ben-Yaakov - Israel

1055 - STUDY OF TWO-MEMRISTOR CIRCUIT MODEL WITH EXPLICIT COMPOSITION METHOD

Denis Butusov, Saint Petersburg Electrotechnical University “leti”, Russia
Valerii Ostrovskii, Saint Petersburg Electrotechnical University “leti”, Russia
Alexander Zubarev, Saint Petersburg Electrotechnical University “leti”, Russia

1093 - STOCHASTIC BIFURCATION IN GENERALIZED CHUA'S CIRCUIT THROUGH ALPHA-STABLE LEVY NOISE

Serpil Yilmaz, Izmir Insitute Of Technology, Turkey
Ferit Acar Savaci, Izmir Insitute Of Technology, Turkey

1104 - STOCHASTIC DEEP LEARNING IN MEMRISTIVE NETWORKS

Anakha V Babu, New Jersey Institute Of Technology, United States
Bipin Rajendran, New Jersey Institute Of Technology, United States

9017 - A CMOS PROGRAMMABLE PHASE SHIFTER FOR COMPENSATING SYNCHRONOUS DETECTION BIOIMPEDANCE SYSTEMS

Panagiotis Kassanos, The Hamlyn Centre, Imperial College London, United Kingdom
Guang-zhong Yang, The Hamlyn Centre, Imperial College London, United Kingdom

9062 - NONLINEAR MODELING AND ANALYSIS OF BUCK CONVERTER USING VOLTERRA SERIES

Dr. Hitesh Shrimali, Indian Institute Of Technology Mandi, India
Vijender Kumar Sharma, Indian Institute Of Technology Mandi, India
Dr. Jai Narayan Tripathi, Stmicroelectronics Pvt. Ltd., India
Rakesh Malik, Stmicroelectronics Pvt. Ltd., India

Invited Special Session

Thursday, December 07, 2017

1070 - SAMPLING BASED RANDOM NUMBER GENERATOR FOR STOCHASTIC COMPUTING

M.burak Karadeniz, Istanbul Technical University, Turkey
Mustafa Altun, Istanbul Technical University, Turkey

1088 - YIELD ANALYSIS OF NANO-CROSSBAR ARRAYS FOR UNIFORM AND CLUSTERED DEFECT DISTRIBUTIONS

Onur Tunali, Istanbul Technical University, Turkey
Mustafa Altun, Istanbul Technical University, Turkey

AMM-4 Analog Circuits

Thursday, December 07, 2017 11:15 - 13:00

Chair: Cristina Meinhardt - Brazil

1019 - AN ULTRA-WIDE-RANGE FINE-RESOLUTION TWO-STEP TIME-TO-DIGITAL CONVERTER WITH BUILT-IN FOREGROUND COARSE GAIN CALIBRATION

Ryuichi Enomoto, The University Of Tokyo, Japan
Tetsuya Iizuka, The University Of Tokyo, Japan
Toru Nakura, The University Of Tokyo, Japan
Kunihiro Asada, The University Of Tokyo, Japan

9028 - A LOW PHASE NOISE CMOS OSCILLATOR WITH SIMPLE TAIL CURRENT- SHAPING IN WIRELESS SOC

Amir Mahdavi, Rajaee University Tehran, Iran

9029 - A ROBUST AND LOW-POWER SYNCHRONIZATION TECHNIQUE OF COARSE-AND-FINE CONVERSION PARTS IN RING-OSCILLATOR-BASED TIME-TO-DIGITAL CONVERTERS

Takayuki Okazawa, Toyohashi University Of Technology, Japan
Ippei Akita, Toyohashi University Of Technology, Japan

9030 - ON THE JITTER-TO-FAST-CLOCK-PERIOD RATIO IN OSCILLATOR-BASED TRUE RANDOM NUMBER GENERATORS

Eduardo Bejar, Pontifical Catholic University Of Peru, Peru
Julio Saldaña, Pontifical Catholic University Of Peru, Peru
Erick Raygada, Pontifical Catholic University Of Peru, Peru
Carlos Silva, Pontifical Catholic University Of Peru, Peru

9068 - MULTI-STEP AND HIGH-RESOLUTION VERNIER-BASED TDC ARCHITECTURE

Mostafa Rashdan, The American College Of The Middle East, Kuwait

COM-4 Communications

Thursday, December 07, 2017 11:15 - 13:00

Chair: Ivan Grech - Malta

1067 - PERFORMANCE ANALYSIS OF THE ENERGY EFFICIENT CLUSTERING MODELS IN WIRELESS SENSOR NETWORKS

Sercan Vançin, Firat University, Turkey
Ebubekir Erdem, Firat University, Turkey

1072 - XGT4: AN INDUSTRIAL GRADE, OPEN SOURCE TESTER FOR MULTI-GIGABIT NETWORKS

Juracy Leonardo, Pucrs, Brazil
Lazzarotto Felipe, Pucrs, Brazil
Pigatto Daniel, Teracom, Brazil
Calazans Ney, Pucrs, Brazil
Moraes Fernando, Pucrs, Brazil

9013 - A NOVEL TIME SLOT ASSIGNMENT METHOD IN MOBILE MESH NETWORKS

Tugrul Akyuz, Netas Telecommunication A.s., Turkey
Omer Aydin, Netas Telecommunication A.s., Turkey

9040 - SPUR REDUCTION BY SELF-INJECTION LOOP IN A FRACTIONAL-N PLL

Mayu Kobayashi, Graduate School Of Engineering, Osaka Institute Of Technology, Japan
Yuya Masui, Graduate School Of Engineering, Osaka Institute Of Technology, Japan
Takao Kihara, Graduate School Of Engineering, Osaka Institute Of Technology, Japan
Tsutomu Yoshimura, Graduate School Of Engineering, Osaka Institute Of Technology, Japan

9063 - EFFICIENT POLYNOMIAL REGRESSION ALGORITHM FOR LTE TURBO DECODING

Mostafa Foda, Tu Darmstadt, Germany
Mohamed Abd El Ghany, German University In Cairo, Egypt., Tu Darmstadt, Germany, Egypt
Klaus Hoffman, Tu Darmstadt, Germany

ETD-2 Technics in Emerging Technologies

Thursday, December 07, 2017 11:15 - 13:00

Chair: Abbas Erfanian - Iran

1016 - TEMPERATURE DEPENDENCE AND ZTC BIAS POINT EVALUATION OF SUB 20NM BULK MULTIGATE DEVICES

Ygor Aguiar, Ufrgs, Brazil
Alexandra Zimpeck, Ufrgs, Brazil
Cristina Meinhardt, Furg, Brazil
Ricardo Reis, Ufrgs, Brazil

1042 - DESIGN AND IMPLICATION OF A RULE BASED WEIGHT SPARSITY MODULE IN HTM SPATIAL POOLER

Timur Ibrayev, Purdue University, United States
Olga Krestinskaya, Nazarbayev University, Kazakhstan
Alex James, Nazarbayev University, Kazakhstan

1080 - THE ART OF EXTRACTING CIRCUIT TRANSFER FUNCTIONS WITH SUTRA ANALYSES

Sotoudeh Hamedi-hagh, San Jose State University, United States

1101 - SET RESPONSE OF FINFET-BASED MAJORITY VOTER CIRCUITS UNDER WORK-FUNCTION FLUCTUATION

Ygor Aguiar, Ufrgs, Brazil
Fernanda Kastensmidt, Ufrgs, Brazil
Cristina Meinhardt, Furg, Brazil
Ricardo Reis, Ufrgs, Brazil

9027 - ANALYTICAL MODELING OF TRANSCONDUCTANCE IN ORGANIC THIN-FILM TRANSISTORS

Reza Meshkin, Lashtenesha-zibakenar Branch, Islamic Azad University, Iran
Seyed Ali Sedigh Ziabari, Rasht Branch, Islamic Azad University, Iran

VLSI-1 Systems Perspective

Thursday, December 07, 2017 11:15 - 13:00

Chair: Ippei Akita - Japan

1031 - IMPACT OF SCHMITT TRIGGER INVERTERS ON PROCESS VARIABILITY ROBUSTNESS OF 1-BIT FULL ADDERS

Samuel Presa Toledo, Furg, Brazil
Alexandra L. Zimpeck, Ufrgs, Brazil
Cristina Meinhardt, Furg, Brazil

1053 - COMPARING 32NM FULL ADDER TMR AND DTMR ARCHITECTURES

Giane Ulloa, Furg, Brazil
Vinicius Lucena, Furg, Brazil
Cristina Meinhardt, Furg, Brazil

1119 - EXPLORING THE USE OF PARALLEL PREFIX ADDER TOPOLOGIES INTO APPROXIMATE ADDER CIRCUITS

Morgana Macedo Azevedo Da Rosa, Catholic University Of Pelotas (ucpel), Brazil
Leonardo Soares, Federal University Of Rio Grande Do Sul (ufrgs), Brazil
Bianca Silveira, Catholic University Of Pelotas (ucpel), Brazil
Cláudio M. Diniz, Catholic University Of Pelotas (ucpel), Brazil
Eduardo A. C. Da Costa, Catholic University Of Pelotas (ucpel), Brazil

1120 - EXPLORING THE COMBINATION OF NUMBER OF BITS AND NUMBER OF ITERATIONS FOR A POWER-EFFICIENT FIXED-POINT CORDIC IMPLEMENTATION

Andre Sapper, Ucpel, Brazil
Leonardo Soares, Ufrgs, Brazil
Eduardo Costa, Ucpel, Brazil
Sergio Bampi, Ufrgs, Brazil

9060 - AN EMBEDDED MULTI-SENSOR DATA FUSION DESIGN FOR VEHICLE PERCEPTION TASKS

Mokhtar Bouain, University Of Valenciennes, Lamih, France

ADP-1 Signal Processing

Thursday, December 07, 2017 14:15 - 16:00

Chair: Peter Szolgay - Hungary

1052 - ASSESSMENT OF SEVEN RECONSTRUCTION METHODS FOR CONTEMPORARY COMPRESSIVE SENSING

Hamza Al Maharmeh, Khalifa University, United Arab Emirates
Hani Saleh, Khalifa University, United Arab Emirates
Baker Mohammad, Khalifa University, United Arab Emirates
Mohammad Ismail, Wayne State University, United States
Thanos Stouraitis, Khalifa University, United Arab Emirates

1073 - DISTANCE ACOUSTIC MONITORING OF PIPELINES

Aleksey Iliev, Don State Technical University, Russia
Zibrov Valeriy, Don State Technical University, Russia
Maltseva Djamilya, Don State Technical University, Russia
Zanina Irina, Don State Technical University, Russia

1079 - DISTRIBUTION LEVEL SYNCHROPHASOR: DEVELOPMENT AND IMPROVEMENT

Jiecheng Zhao, The University Of Tennessee, Knoxville, United States
Wenxuan Yao, The University Of Tennessee, Knoxville, United States
Lingwei Zhan, Oak Ridge National Laboratory, United States
Haoyang Lu, The University Of Tennessee, Knoxville, United States
Yong Liu, The University Of Tennessee, Knoxville, United States
Dao Zhou, The University Of Tennessee, Knoxville, United States
Wei Gao, The University Of Tennessee, Knoxville, United States
Yilu Liu, The University Of Tennessee, Knoxville, United States

9049 - EFFICIENT TIME DOMAIN METHOD FOR KNOCK SIGNAL DENOISING

Amirhossein Moshrefi, University Of Tehran, Iran
Hossein Aghababa, University Of Tehran, Iran

9059 - INDIVIDUAL RECOGNITION OF PERSONALITY TRAITS FROM READING TEXT SPEECH

Mohsen Fallahnezhad, K. N. Toosi University Of Technology, Iran
Mansour Vali, K. N. Toosi University Of Technology, Iran
Mehdi Khalili, Department Of Psychology Pasteurno Hospital, Iran

AMM-5 Analog Circuits

Thursday, December 07, 2017 14:15 - 16:00

Chair: Ljiljana Milic - Serbia

1051 - A LOW-POWER, HIGH-RESOLUTION, 1 GHZ DIFFERENTIAL COMPARATOR WITH LOW-OFFSET AND LOW-KICKBACK

Mehdi Nasrollahpour, San Jose State University, United States
Muhammad Aldacher, San Jose State University, United States
Sotoudeh Hamedi-hagh, San Jose State University, United States

1105 - HARDENING C-ELEMENTS AGAINST METASTABILITY

Leandro Heck, Pucrs, Brazil
Matheus Moreira, Pucrs, Brazil
Ney Calazans, Pucrs, Brazil

9008 - A TRIANGULAR ACTIVE CHARGE INJECTION SCHEME USING A RESISTIVE CURRENT FOR RESONANT POWER SUPPLY NOISE SUPPRESSION

Masahiro Kano, The University Of Tokyo, Japan
Toru Nakura, The University Of Tokyo, Japan
Tetsuya Iizuka, The University Of Tokyo, Japan
Kunihiro Asada, The University Of Tokyo, Japan

9012 - COMPACT FIRST ORDER TEMPERATURE-COMPENSATED CMOS CURRENT REFERENCE

Dmitry Osipov, University Of Bremen, Germany
Steffen Paul, University Of Bremen, Germany

9014 - DIGITAL FCS-MP CONTROL OF AN AC-DC POWER CONVERTER TO IMPROVE DYNAMIC RESPONSE

Abdolsamad Hamidi, Razi University, Iran
Shahram Karimi, Razi University, Iran
Arash Ahmadi, University Of Windsor, Canada
Majid Ahmadi, University Of Windsor, Canada

VLSI-2 Realization

Thursday, December 07, 2017 14:15 - 16:00

Chair: Payman Zarkesh-Ha - United States

1054 - SELF-HEALING ROUTER ARCHITECTURE FOR HIGH PERFORMANCE NETWORK-ON-CHIPS

Kasem Khalil, University Of Louisiana At Lafayette, United States
Omar Eldash, University Of Louisiana At Lafayette, United States
Magdy Bayoumi, University Of Louisiana At Lafayette, United States

1064 - A 65NM ASIC DESIGN FOR MEASURING MENTAL STRESS FROM THE HEART RATE VARIATIONS

Huda Goian, Khalifa University, United Arab Emirates
Aamna Alali, Khalifa University, United Arab Emirates
Temesghen Habte, Khalifa University, United Arab Emirates
Hani Saleh, Khalifa University, United Arab Emirates
Tasneem Assaf, Khalifa University, United Arab Emirates

1081 - CAR: ON THE HIGHWAY TOWARDS DE-SYNCHRONIZATION

Francois Bertrand, Tima/starchip, France
Abdelkarim Cherkaoui, Tima, France
Jean Simatic, Tima, France
Anthony Maure, Starchip, France
Laurent Fesquet, Tima, France

9011 - HIGH PERFORMANCE CMOS LEVEL UP SHIFTER WITH FULL–SCALE 1.2V OUTPUT VOLTAGE

Jose Carlos Garcia,, University Of Las Palmas De Gran Canaria, Spain
Juan Montiel–nelson, University Of Las Palmas De Gran Canaria, Spain
Saeid Nooshabadi, Michigan Technological University, United States

9057 - AN AGING-AWARE MODEL FOR THE LEAKAGE POWER OF NANO-SCALED DIGITAL INTEGRATED CIRCUITS IN IOT ERA

Amirhossein Moshrefi, University Of Tehran, Iran
Hossein Aghababa, University Of Tehran, Iran

ADP-2 Imaging

Thursday, December 07, 2017 16:15 - 18:00

Chair: Nikolay Prokopenko - Russia

1033 - OPTIMIZATION AND HARDWARE IMPLEMENTATION OF IMAGE WATERMARKING FOR LOW COST APPLICATIONS

Konstantinos Pexaras, Department Of Information And Communication Systems Engineering, University Of The Aegean, Greece
Christos Tsiourakis, Cisco Systems, The Netherlands
Irene Karybali, Department Of Information And Communication Systems Engineering, University Of The Aegean, Greece
Emmanouil Kalligeros, Department Of Information And Communication Systems Engineering, University Of The Aegean, Greece

1048 - COLOR BASED HDR IMAGE RETRIEVAL USING HSV HISTOGRAM AND COLOR MOMENTS

Raoua Khwildi, Enit, Tunisia
Azza Ouled Zaid, Enit, Tunisia

1091 - THE EFFECT OF SECRET IMAGE TRANSFORMATION ON THE STEGANOGRAPHY PROCESS

Mohamed Buker, Atilim University, Turkey
Hakan Tora, Atilim University, Turkey
Erhan Gokcay, Atilim University, Turkey

1112 - REVERSIBLE WATERMARKING IN MEDICAL IMAGING WITH ZERO DISTORTION IN ROI

Ales Rocek, Masaryk University, Czech Republic
Michal Javornik, Masaryk University, Czech Republic
Karel Slavicek, Masaryk University, Czech Republic
Otto Dostal, Masaryk University, Czech Republic

9005 - AN INTELLIGENT READOUT INTEGRATED CIRCUIT (IROIC) WITH ON-CHIP LOCAL GRADIENT OPERATIONS

Javier Soto, Universidad De Concepción, Chile
Wladimir Valenzuela, Universidad De Concepción, Chile
Silvana Díaz, Universidad De Concepción, Chile
Antonio Saavedra, Universidad De Concepción, Chile
Miguel Figueroa, Universidad De Concepción, Chile
Javad Ghasemi, University Of New Mexico, United States
Payman Zarkesh-ha, University Of New Mexico, United States

9044 - MODULAR EVALUATION SYSTEM FOR LOW-POWER APPLICATIONS

Andrea Schwandt, Bonn-rhein-sieg University, Germany
Marco Winzker, Bonn-rhein-sieg University, Germany

AMM-6 Analog Mixed Mode Circuits

Thursday, December 07, 2017 16:15 - 18:00

Chair: Tetsuya Hirose - Japan

1100 - A 28UM[SUP]2[/SUP], 0.11HZ, 4.5PW GATE LEAKAGE TIMER USING DIFFERENTIAL LEAKAGE TECHNIQUE IN 55NM DDC CMOS FOR SMALL-FOOTPRINT, LOW-FREQUENCY AND LOW-POWER TIMING GENERATION

Yuya Nishio, Nagoya University, Japan
Atsuki Kobayashi, Nagoya University, Japan
Kiichi Niitsu, Nagoya University, Japan

1012 - THE IMPLEMENTATION OF A SUCCESSIVE CANCELLATION POLAR DECODER ON XILINX SYSTEM GENERATOR

A.cagri Arli, Cankaya University, Turkey
Ayse Colak, Cankaya University, Turkey
Orhan Gazi, Cankaya University, Turkey

1050 - LEVEL-SHIFTED NEURAL ENCODED ANALOG-TO-DIGITAL CONVERTER

Aigerim Tankimanova, Nazarbayev University, Kazakhstan
Akshay Maan, Nazarbayev University/griffith University, Australia
Alex James, Nazarbayev University, Kazakhstan

1103 - GO FUNCTIONAL MODEL FOR A RISC-V ASYNCHRONOUS ORGANIZATION - ARV

Marcos Sartori, Pucrs, Brazil
Ney Calazans, Pucrs, Brazil

9035 - A 5.9 GHZ RF RECTIFIER FOR WIRELESS POWER TRANSMISSION APPLICATIONS

Mariem Kanoun, Enis, Tunisia
David Cordeau, Université De Poitiers, France
Jean Marie Paillot, Université De Poitiers, France
Hassene Mnif, Enis, Tunisia
Mourad Loulou, Enis, Tunisia

BEC-1 Bio-Imaging

Thursday, December 07, 2017 16:15 - 18:00

Chair: Sotoudeh Hamedi-Hagh - United States

1027 - ADAPTIVE FACE SPACE MODELS WITH DYNAMIC NEURAL PRIORS AND SPARSE CODING

Samira Reihanian, Nazarbayev University, Kazakhstan
Amin Zollanvari, Nazarbayev University, Kazakhstan
Alex Pappachen James, Nazarbayev University, Kazakhstan

9009 - MEDICAL IMAGES PROTECTION AND AUTHENTICATION USING HYBRID DWT-DCT AND SHA256-MD5 HASH FUNCTIONS

Alavi Kunhu, University Of Dubai, United Arab Emirates
Hussain Al-ahmad, University Of Dubai, United Arab Emirates
Fatma Taher, Zayed University College of Technological Innovation, United Arab Emirates

9051 - ANALYSIS OF NEURAL ACTIVITY FROM EEG DATA USING EMD FREQUENCY BANDS

Maximiliano Bueno-lopez, Ntnu, Norway
Eduardo Giraldo, Universidad Tecnologica De Pereira, Colombia
Marta Molinas, Ntnu, Norway

1113 - A SCALABLE TIME-DOMAIN BIOSENSOR ARRAY USING A CAPACITOR-LESS CMATC AND LOGARITHMIC CYCLIC TIME-ATTENUATION-BASED TDC WITH DISCHARGE ACCELERATION FOR HIGH-SPATIAL-RESOLUTION BIO-IMAGING

Kei Ikeda, Nagoya University, Japan
Atsuki Kobayashi, Nagoya University, Japan
Kiichi Niitsu, Nagoya University, Japan

BEC-2 Bio-Devices

Friday, December 08, 2017 11:15 - 13:00

Chair: Francois Rivet - France

1014 - A 115V BI-PHASIC PULSE ELECTRICAL MUSCLE STIMULATOR BY USING INDUCTOR-SHARING DUAL-OUTPUT BOOST CONVERTER WITH SUPPLY-STEPPING SWITCH DRIVER

Atit Tamtrakarn, Thai-nichi Institute Of Technology, Thailand

1063 - AUTOMATIC DETECTION OF CORONARY ARTERY DISEASE (CAD) IN AN ECG SIGNAL

Ayesha Alhosani, Khalifa University, United Arab Emirates
Sara Alshizawi, Khalifa University, United Arab Emirates
Shayma Alali, Khalifa University, United Arab Emirates
Hani Saleh, Khalifa University, United Arab Emirates
Tasneem Assaf, Khalifa University, United Arab Emirates
Thanos Stouraitis, Khalifa University, United Arab Emirates

1066 - A NEW BIO-IMPLANTABLE TRANSMITTER TOPOLOGY FOR MINIMIZING THE ANTENNA EFFECTS

Mojtaba Daliri, Imamreza International University, Iran

1111 - A 373µW TIME CONSTANT BASED IMPEDANCE SPECTROSCOPY FOR NON-INVASIVE BLOOD GLUCOSE MONITORING

Wala Saadeh, Lahore University Of Management Sciences, Pakistan
Muhammad Awais Bin Altaf, Lahore University Of Management Sciences, Pakistan

9036 - RESEARCH OF LIMITING CHARACTERISTICS OF PEAK DETECTOR FOR ANALOG INTERFACE IN IMPEDANCE SPECTROSCOPY SYSTEMS

Leontiy Samoilov, Southern Federal University, Russia
Evgeniy Zhebrun, Jsc "niima "progress", Russia
Petr Budyakov, Don State Technical University, Russia

LPE-1 Low Power & Energy Harvesting

Friday, December 08, 2017 11:15 - 13:00

Chair: Nathalie Deltimple - France

1020 - A LOW - VOLTAGE HYSTERESIS COMPARATOR FOR LOW POWER APPLICATIONS

Takumi Saito, Tokyo Denki University, Japan
Satoshi Komatsu, Tokyo Denki University, Japan

1076 - RF ENERGY HARVESTING SYSTEM AND CIRCUITS FOR CHARGING OF WIRELESS DEVICES USING SPECTRUM SENSING

Naser Ahamdi Moghaddam, Tarbiat Modares University, Iran
Alireza Maleki, K. N. Toosi University Of Technology, Iran
Navid Shahbazi Panah, Amirkabir University Of Technology, Iran
Mehdi Shirichian, K. N. Toosi University Of Technology, Iran

9025 - A FRAMEWORK FOR SYSTEM LEVEL LOW POWER DESIGN SPACE EXPLORATION

Ameni Ben Mrad, Université Côte D’azur, Cnrs, Leat, France
Michel Auguin, Université Côte D’azur, Cnrs, Leat, France
François Verdier, Université Côte D’azur, Cnrs, Leat, France
Amal Ben Ameur, Université Côte D’azur, Cnrs, Leat, France

9045 - A CMOS MPPT POWER CONDITIONING CIRCUIT FOR ENERGY HARVESTERS

Francarl Galea, University Of Malta, Malta
Owen Casha, University Of Malta, Malta
Ivan Grech, University Of Malta, Malta
Edward Gatt, University Of Malta, Malta
Joseph Micallef, University Of Malta, Malta

9061 - CHARACTERIZATION OF RF ENERGY HARVESTING AT 2.4 GHZ

Hadeel Aboueidah, Khalifa University Of Science, Technology And Research, United Arab Emirates
Nasma Abbas, Khalifa University Of Science, Technology And Research, United Arab Emirates
Nadeen El-nachar, Khalifa University Of Science, Technology And Research, United Arab Emirates
Aya Alyousef, Khalifa University Of Science, Technology And Research, United Arab Emirates
Mohammad Alhawari, Khalifa University Of Science, Technology And Research, United Arab Emirates
Baker Mohammad, Khalifa University Of Science, Technology And Research, United Arab Emirates
Hani Saleh, Khalifa University Of Science, Technology And Research, United Arab Emirates
Tasneem Assaf, Khalifa University Of Science, Technology And Research, United Arab Emirates
Mohammed Ismail, Khalifa University Of Science, Technology And Research, United Arab Emirates

MEMS

Friday, December 08, 2017 11:15 - 13:00

Chair: Kunihiro Asada - Japan

1069 - MULTI-LOOP UNITY-STF STURDY MASH DELTA-SIGMA MODULATOR

Reza Gholami, Noshirvani University Of Technology, Iran

1108 - DESIGN AND EXPERIMENTAL APPLICATION OF FRACTIONAL AND INTEGER ORDER SLIDING MODE CONTROL TO AN INDUSTRIAL PROCESS WITH TIME DELAY

Necdet Sinan Ozbek, Adana Science And Technology University, Turkey
Ilyas Eker, Cukurova University, Turkey

1110 - A COMPARATIVE EVALUATION OF MODEL-BASED AND MODEL-FREE CONTROL STRATEGIES FOR QUADROTOR TYPE UNMANNED AERIAL VEHICLES

Necdet Sinan Ozbek, Adana Science And Technology University, Turkey
Ilyas Eker, Cukurova University, Turkey

9010 - THE APPLICATION OF THE MULTIVALUED LOGICAL ELEMENTS “MINIMUM” AND “MAXIMUM” FOR THE SENSOR CURRENT SIGNAL PROCESSING

Nikolay Chernov, Don State Technical University, Russia
Nikolay Prokopenko, Don State Technical University, Russia
Vladislav Yugai, Don State Technical University, Russia
Nikolay Butyrlagin, Don State Technical University, Russia

PS1

Wednesday, December 06, 2017 14:15 - 16:00

1028 - A MEMS LOW-IF IQ-MIXER IN METALMUMPS: MODELLING AND SIMULATION

Jeremy Scerri, University Of Malta, Malta
Ivan Grech, University Of Malta, Malta
Edward Gatt, University Of Malta, Malta
Owen Casha, University Of Malta, Malta

1041 - ARBITRARY GENERATION OF PHASE SHIFT BY PSEUDO-DIFFERENTIAL BILINEAR SECTIONS AND THEIR APPLICATION

Roman Sotner, Six Research Center, Faculty Of Electrical Engineering And Communication, Brno University Of Technology, Czech Republic
Jan Jerabek, Six Research Center, Faculty Of Electrical Engineering And Communication, Brno University Of Technology, Czech Republic
Jiri Petrzela, Six Research Center, Faculty Of Electrical Engineering And Communication, Brno University Of Technology, Czech Republic
Norbert Herencsar, Six Research Center, Faculty Of Electrical Engineering And Communication, Brno University Of Technology, Czech Republic
Roman Prokop, Six Research Center, Faculty Of Electrical Engineering And Communication, Brno University Of Technology, Czech Republic
Tomas Dostal, Dept. Of Technical Studies, College Of Polytechnics Jihlava, Czech Republic

1056 - ALL-DIGITAL 1550 NM OPTICAL AQUEOUS GLUCOSE SOLUTION MEASUREMENT SYSTEM

Volkan Turgul, University Of Westminster, United Kingdom
Izzet Kale, University Of Westminster, United Kingdom

1062 - APPLICATION-SPECIFIC PROCESSOR FOR LOCAL-BINARY-PATTERNS GENERATION

Bilal Taha, Khalifa University, United Arab Emirates
Lilas Alrahis, Khalifa University, United Arab Emirates
Tasneem Assaf, Khalifa University, United Arab Emirates
Naoufel Werghi, Khalifa University, United Arab Emirates
Hani Saleh, Khalifa University, United Arab Emirates
Thanos Stouraitis, Khalifa University, United Arab Emirates

1084 - SYSTEM-ON-A-CHIP (SOC)-BASED HARDWARE ACCELERATION FOR EXTREME LEARNING MACHINE

Amin Safaei, University Of Windsor, Canada
Q. M. Jonathan Wu, University Of Windsor, Canada
Yimin Yang, University Of Windsor, Canada
Thangarajah Akilan, University Of Windsor, Canada

1087 - A VCO-FREE LOW-POWER FULLY DIGITAL BPSK DEMODULATOR FOR IMPLANTABLE BIOMEDICAL MICROSYSTEMS

Mahdi Hosseinnejad, Iran University Of Science And Technology, Iran
Abbas Erfanian, Iran University Of Science And Technology, Iran

1102 - FRAMEWORK-BASED ARITHMETIC CORE GENERATION TO EXPLORE ASIC-BASED PARALLEL BINARY MULTIPLIERS

Leandro Rocha, Ufrgs, Brazil
Guilherme Paim, Ufrgs, Brazil
Rafael Ferreira, Ucpel, Brazil
Eduardo Costa, Ucpel, Brazil
Sergio Bampi, Ufrgs,

1107 - IMPROVED GOLDSCHMIDT ALGORITHM FOR FAST AND ENERGY-EFFICIENT FIXED-POINT DIVIDER

Pedro Marques, Ucpel, Brazil
Guilherme Paim, Ufrgs, Brazil
Eduardo Costa, Ucpel, Brazil
Sergio Almeida, Ucpel, Brazil

1116 - USING EFFICIENT ADDER COMPRESSORS WITH A SPLIT-RADIX BUTTERFLY HARDWARE ARCHITECTURE FOR LOW-POWER IOT SMART SENSORS

Gustavo Santana, Ufrgs, Brazil
Guilherme Paim, Ufrgs, Brazil
Leandro Rocha, Ufrgs, Brazil
Mateus Fonseca, Ufpel, Brazil
Renato Neuenfeld, Ucpel, Brazil
Eduardo Costa, Ucpel, Brazil
Sergio Bampi, Ufrgs, Brazil

1117 - USING ADDER AND SUBTRACTOR COMPRESSORS TO SUM OF ABSOLUTE TRANSFORMED DIFFERENCES ARCHITECTURE FOR LOW-POWER VIDEO ENCODING

Brunno Abreu, Ufrgs, Brazil
Mateus Grellert, Ufrgs, Brazil
Guilherme Paim, Ufrgs, Brazil
Rafael Ferreira, Ucpel, Brazil
Bianca Silveira, Ucpel, Brazil
Cláudio Diniz, Ucpel, Brazil
Eduardo Costa, Ucpel, Brazil
Sergio Bampi, Ufrgs, Brazil

9041 - THE DESIGN OF MEMRISTOR BASED HIGH PASS FILTER CIRCUITS

Muhammet Emin Sahin, Firat University, Turkey
Hasan Guler, Firat University, Turkey

PS2

Wednesday, December 06, 2017 16:15 - 18:00

1021 - AN ULTRA-LOW-POWER SUPERCAPACITOR VOLTAGE MONITORING SYSTEM FOR LOW-VOLTAGE ENERGY HARVESTING

Takanori Sato, Kobe University, Japan
Tetsuya Hirose, Kobe University, Japan
Hiroki Asano, Kobe University, Japan
Nobutaka Kuroki, Kobe University, Japan
Masahiro Numa, Kobe University, Japan

1022 - A 0.1-0.6 V INPUT RANGE VOLTAGE BOOST CONVERTER WITH LOW-LEAKAGE DRIVER FOR LOW-VOLTAGE ENERGY HARVESTING

Yuto Tsuji, Kobe University, Japan
Tetsuya Hirose, Kobe University, Japan
Toshihiro Ozaki, Kobe University, Japan
Hiroki Asano, Kobe University, Japan
Nobutaka Kuroki, Kobe University, Japan
Masahiro Numa, Kobe University, Japan

1040 - AGING AWARE SAFE OPERATING AREA INVESTIGATION OF SWITCHING CONVERTER OUTPUT STAGES THROUGH 2D PLOTS

Engin Afacan, Kocaeli University, Turkey
Kemal Ozanoglu, Dialog Semiconductor, Turkey
Merve Toka, Dialog Semiconductor, Turkey

1044 - LINEAR FEEDBACK IN NONLINEAR CIRCUITS

Zhenlong Xiao, Xiamen University, China

1071 - AN ULTRA LOW POWER, LOW NOISE EEG AMPLIFIER WITH CHOPPER STABILISATION AND PSEUDO-RESISTOR CALIBRATION

Mohammad Abbasi, Imperial College, United Kingdom

1083 - AN ENERGY-EFFICIENT FPGA-BASED MATRIX MULTIPLIER

Yiyu Tan, Riken Aics, Japan
Toshiyuki Imamura, Riken Aics, Japan

1096 - INSTRUCTION-LEVEL PROGRAMMING APPROACH FOR VERY LONG INSTRUCTION WORLD DIGITAL SIGNAL PROCESSORS

Tomas Fryza, Brno University Of Technology, Czech Republic
Roman Mego, Brno University Of Technology, Czech Republic

1099 - EXPLOITING ABSOLUTE ARITHMETIC FOR POWER-EFFICIENT SUM OF ABSOLUTE DIFFERENCES

Brunno Abreu, Ufrgs, Brazil
Guilherme Paim, Ufrgs, Brazil
Mateus Grellert, Ufrgs, Brazil
Bianca Silveira, Ucpel, Brazil
Cláudio Diniz, Ucpel, Brazil
Eduardo Costa, Ucpel, Brazil
Sergio Bampi, Ufrgs, Brazil

1118 - IMPACT OF SRAM IP ASPECT RATIO IN ASIC-ORIENTED VITERBI DECODER PHYSICAL IMPLEMENTATION

Leandro Rocha, Ufrgs, Brazil
Guilherme Paim, Ufrgs, Brazil
Gustavo Santana, Ufrgs, Brazil
Rafael Ferreira, Ucpel, Brazil
Eduardo Costa, Ucpel, Brazil
Sergio Bampi, Ufrgs, Brazil

9026 - CO-VERIFICATION DESIGN FLOW FOR HDL LANGUAGES

Laurent Beaulieu, B<>com, France
Olivier Weppe, B<>com, France
Benoit Le Ledec, B<>com, France
Florien Lebeau, B<>com, France

Invited Special Session - Circuit Design Techniques for Emerging Computing Systems

Thursday, 7 December 2017 14:15 - 16:00

Chair: Sıddık Yarman - Turkey

1070 - SAMPLING BASED RANDOM NUMBER GENERATOR FOR STOCHASTIC COMPUTING

M. Burak Karadeniz, Istanbul Technical University, Turkey
Mustafa Altun, Istanbul Technical University, Turkey

1088 - YIELD ANALYSIS OF NANO-CROSSBAR ARRAYS FOR UNIFORM AND CLUSTERED DEFECT DISTRIBUTIONS

Onur Tunalı, Istanbul Technical University, Turkey
Mustafa Altun, Istanbul Technical University, Turkey

9090- DESIGN OF A HIGH GAIN TELESCOPIC-CASCODE OPERATIONAL AMPLIFIER BASED ON THE ZTC OPERATION CONDITION

Lida Kouhalvandi, Istanbul Technical University, Turkey
Sercan Aygün, Istanbul Technical University, Turkey
Ece Olcay Günes, Istanbul Technical University, Turkey
Mürvet Kirci, Istanbul Technical University, Turkey

9091 - AN IMPROVED 2 STAGE OPAMP WITH RAIL-TO-RAIL GAIN-BOOSTED FOLDED CASCODE INPUT STAGE AND MONTICELLI RAIL-TO-RAIL CLASS AB OUTPUT STAGE

Special Session - In Memoriam

Thursday, 7 December 2017 16:15 - 18:00

Chair: Cem Göknar - Turkey

9100 - ALFRED FETTWEIS

Sıddık Yarman, İstanbul University, Turkey

9101 - TAMAS ROSKA

Peter Szolgay, Pázmány Péter Catholic University, Hungary

9102 - YILMAZ TOKAD

Erol Sezer, Yaşar University, Turkey

9103 - MIRKO MILIC and RADOSLAV HORVAT

Ljiljana Milic, University of Belgrade, Serbia
Ljiljana Trajkovic, Simon Fraser University, Canada